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? V BATT ( MIN ) ?
PD COND ( LS ) = ? 1 ?
? × I CH G × R DS ( ON )
( HS ) = × t
× V
× I
× f
PD SW TRANS CSSP CHG SW
Generally, a low gate charge high-side MOSFET is pre-
ferred to minimize switching losses. However, the
R DS(ON) required to stay within package power dissi-
pation often limits how small the MOSFET can be. The
optimum occurs when the switching losses equal the
conduction losses. High-side switching losses do not
usually become an issue until the input is greater than
approximately 15V. Calculating the power dissipation in
N1 due to switching losses is difficult since it must
allow for difficult quantifying factors that influence the
turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold volt-
age, source inductance, and PCB layout characteris-
tics. The following switching-loss calculation provides
only a very rough estimate and is no substitute for
breadboard evaluation, preferably including a verifica-
tion using a thermocouple mounted on N1:
1
2
where t TRANS is the drivers transition time and can be
calculated as follows:
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied. If the high-side MOSFET chosen
for adequate R DS(ON) at low-battery voltages becomes
hot when biased from V DCIN(MAX) , consider choosing
another MOSFET with lower parasitic capacitance.
For the low-side MOSFET (N2), the worst-case power
dissipation always occurs at maximum input voltage:
2
? V CSSP ( MAX ) ?
The following additional loss occurs in the low-side
MOSFET due to the body diode conduction losses:
PD BDY ( LS ) = 0 . 05 × I PEAK × 0 . 4 V
The total power low-side MOSFET dissipation is:
PD TOTAL ( LS ) ≈ PD COND ( LS ) + PD BDY ( LS )
These calculations provide an estimate and are not a
substitute for breadboard evaluation, preferably
including a verification using a thermocouple mounted
t TRANS = ?
+
? 1 1 ?
?
? I GSRC I GSNK ?
× ( Q GD + Q GS )
on the MOSFET.
Inductor Selection
I GSRC and I GSNK are the peak gate-drive source/sink
current (3 Ω sourcing and 0.8 Ω sinking, typically). The
MAX17005/MAX17006/MAX17015 control the switching
frequency as shown in the Typical Operating
Characteristics.
The following is the power dissipated due to high-side
n-channel MOSFET’s output capacitance (C RSS ):
The selection of the inductor has multiple trade-offs
between efficiency, transient response, size, and cost.
Small inductance is cheap and small, and has a better
transient response due to higher slew rate; however, the
efficiency is lower because of higher RMS current. High
inductance results in lower ripple so that the need of the
output capacitors for output voltage ripple goes low.
The MAX17005/MAX17006/MAX17015 combine all the
PD CRSS ( HS ) ≈
V 2 CSSP × C RSS × f SW
2
inductor trade-offs in an optimum way by controlling
switching frequency. High-frequency operation permits
the use of a smaller and cheaper inductor, and conse-
PD QRR ( HS ) =
The following high-side MOSFET’s loss is due to the
reverse-recovery charge of the low-side MOSFET ’s
body diode:
Q RR2 × V CSSP × f SW
2
quently results in smaller output ripple and better tran-
sient response.
The charge current, ripple, and operating frequency
(off-time) determine the inductor characteristics. For
optimum efficiency, choose the inductance according
to the following equation:
Ignore PD QRR (HighSide) if a Schottky diode is used
parallel to a low-side MOSFET.
The total high-side MOSFET power dissipation is:
PD TOTAL ( HS ) ≈ PD COND ( HS ) + PD SW ( HS )
+ PD CRSS ( HS ) + PD QRR ( HS )
L =
where k = 35ns/V.
k × V IN 2
4 × I CHG × LIR MAX
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19
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